TCP630 Reconfigurable FPGA with TTL/Differential I/O to PIM
Module Slot
Standard 3U 32 bit CompactPCI module
conforming to PICMG 2.0 R3.0; User configurable Xilinx FPGA; Flash
device in-system programmable; 32
bit PCI target interface by PLX PCI9030; FPGA clock options: Local
clock oscillator / PLL programmable clock generator (200 KHz - 166
MHz), 6 clock outputs connected to FPGA; I/O lines: 64 TTL I/O or 32
differential I/O or 32 TTL I/O and 16 differential I/O ; TTL
signaling voltage (maximum current: +/-24 mA) or EIA-422/-485
signaling level / direction individually programmable; I/O access:
64 I/O lines via a PIM Module, parallel to up to 64 I/O lines on
rear connector J2; Operating temperature: -40°C to +85°C